Survey on RISC-V System Architecture Research
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Strategic Priority Research Program of CAS (XDC05040000)

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    Abstract:

    ISA (instruction set architecture) is the interface specification between software and hardware, which is also the origin point of an information technology ecosystem. RISC-V is the inevitable product of computer architecture gradually moving towards openness. It brings a new paradigm for system research, i.e. software research issues can be tracked down to ISA, which expands or even subverts the traditional full-stack design theory on the system function, performance, security and other issues, showing a promising development prospect. This paper reviews the research results of RISC-V architecture in recent years. Firstly, the development status of RISC-V instruction set is introduced, and the scope of instruction set that should be paid attention to in RISC-V research is pointed out. Then, the current RISC-V CPU platforms, particularly RISC-V processors are analyzed, and the design points and application scope are summarized. Then, focusing on the design of RISC-V CPU, this paper discusses four fundamental research topics: instruction set, function implementation, performance improvement and security strategy, and reviews some research results in recent years. Finally, with the help of some specific cases, this paper expounds the role of risc-v in specific domains, analyzes the possible future directions of RISC-V research.

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刘畅,武延军,吴敬征,赵琛. RISC-V指令集架构研究综述.软件学报,2021,32(12):3992-4024

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History
  • Received:June 28,2021
  • Revised:September 28,2021
  • Adopted:
  • Online: November 23,2021
  • Published: December 06,2021
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