| 摘要: |
| 当前的量子程序一般由量子电路表示, 由多个量子门组成. 如果程序包含了被直接表示为酉矩阵的门, 需要将这些量子门转化为基本门所构成的量子电路. 该步骤被称为量子电路合成. 然而, 当前的合成方法可能会生成包含数千个门的量子电路. 这些量子电路的质量较低, 在部署到真实含噪声的量子硬件时非常容易输出错误的结果. 此外, 在保证门数量较小的情况下, 当量子比特数量增至8时, 量子电路合成需要数周甚至数月的时间. 在这项工作中, 提出一种量子电路合成方法, 实现从酉矩阵到高质量量子电路的快速合成. 首先介绍一种迭代方法, 通过插入电路模块来逼近目标酉矩阵. 在迭代中, 提出一种具有奖励机制的前瞻策略减少冗余量子门. 在量子电路合成的加速过程中, 为了减少候选电路模块的空间, 提出一种剪枝方法, 首先描述每个候选电路模块的闭包来刻画电路的表示空间, 然后基于模块的表示空间重叠率进行剪枝, 以此构建一个小而高质量的候选集合. 此外, 为了减少搜索最优门参数的开销, 将选定的候选与目标酉矩阵打包成统一电路, 然后通过计算其在基态上的期望来快速获得近似距离. 实验证明, 与当前的最优的量子电路合成方法QuCT和QFAST相比, 该方法在5–8量子比特量子电路合成中实现了减少门数量为原有方法的37.04%–62.50%, 同时实现3.7–20.6倍的加速. |
| 关键词: 量子计算 量子软件 量子程序 编译 程序合成 |
| DOI：10.13328/j.cnki.jos.007343 |
| 分类号: |
| 基金项目:国家重点研发计划(2023YFF0905200); 中央高校基本科研业务费专项资金(226-2024-00051, 226-2024-00140); 浙江尖兵项目(2023C01036) |
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| Fast-USYN: Fast Synthesis from Unitary Matrices to High-quality Quantum Circuits |
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TAN Si-Wei, LU Li-Qiang, LANG Cong-Liang, CHEN Ming-Shuai, YIN Jian-Wei
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College of Computer Science and Technology, Zhejiang University, Hangzhou 310027, China
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| Abstract: |
| Current quantum programs are generally represented by quantum circuits, including various quantum gates. If the program contains gates that are directly represented as unitary matrices, these gates need to be transformed into quantum circuits composed of basic gates. This step is called quantum circuit synthesis. However, current synthesis methods may generate circuits with thousands of gates. The quality of these quantum circuits is low and they are very likely to output incorrect results when deployed to real noisy quantum hardware. When the number of qubits is increased to 8 while ensuring a small number of gates, the quantum circuit synthesis takes weeks or even months. This study proposes a quantum circuit synthesis method, realizing the fast synthesis from unitary matrices to high-quality quantum circuits. Firstly, an iterative method is introduced to approximate the target unitary matrix by inserting circuit modules. During the iteration, a look-ahead strategy with a reward mechanism is proposed to reduce redundant quantum gates. In the acceleration process of quantum circuit synthesis, the study proposes a pruning method to reduce the space of candidate circuit modules. The method first describes the closure of each candidate circuit module to characterize the representation space of the circuit, and then prunes based on the overlap rate of the representation spaces of the modules, thus constructing a small and high-quality candidate set. Furthermore, to reduce the overhead of searching for optimal gate parameters, this study packs the selected candidates with the target unitary into a uniform circuit so that we can quickly obtain the approximation distance by calculating its expectation on the ground state. Experiments show that, compared with the current optimal quantum circuit synthesis methods QuCT and QFAST, this study reduces the number of gates to 37.0%–62.5%, and achieve a 3.7–20.6 times acceleration in the 5 to 8 qubit quantum circuit synthesis. |
| Key words: quantum computing quantum software quantum circuit compiler program synthesis |
