| 摘要: |
| 为了满足应用程序的多样化需求，异构多核处理器出现并逐渐进入市场，其中的处理核心（core）具有不同的微架构或者指令集架构（ISA），为应用提供多样化特性支持，比如指令级并行（ILP）、内存级并行（MLP），这些核心协同工作满足整个计算系统的优化目标，比如高性能、低功耗或者良好的能效.然而，目前主流的调度技术主要是针对传统同构处理器架构设计，没有考虑异构硬件能力的差异性.在异构多核处理器环境下，调度技术如何感知硬件的异构特性，为不同类型的应用程序提供更加合适和匹配的硬件资源，这是值得探索的问题.对近年来在该研究领域的成果进行了综述研究，特别是在性能非对称多核处理器架构下，异构调度技术面临的优化目标、分析模型、调度决策和算法评估等主要问题进行了分析和描述，并依次对相关技术进行了系统的总结，最后从软硬件融合的角度对今后的研究工作进行了展望. |
| 关键词: 异构多核 非对称性多核处理器 异构调度 调度算法 线程分配 |
| DOI：10.13328/j.cnki.jos.005811 |
| 分类号: |
| 基金项目:国家自然科学基金青年基金（61305054）；中国科学院战略性先导科技专项（XDA-Y01-01） |
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| Heterogenity-aware Scheduling Research on Performance Asymmetric Multicore Processors |
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ZHAO Shan1,2, YANG Qiu-Song1, LI Ming-Shu1
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1.National Engineering Research Center of Fundamental Software, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China;2.University of Chinese Academy of Sciences, Beijingg 100190, China
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| Abstract: |
| To meet the diverse needs of the applications, heterogeneous multicore processors appeared and entered into market, where the processing cores have a different microarchitecture or instruction set architecture (ISA), providing special features such as instruction level parallelism (ILP) and memory level parallelism (MLP). These cores work together to meet the optimization objectives of the entire computing system, such as high performance, low power consumption or energy efficiency. However, the mainstream scheduling technology is designed for the traditional homogeneous processor architecture, without considering the differences of processing capabilities of various cores. It is worth exploring for scheduling technologies that can perceive the heterogeneous characteristics of the hardware and make more suitable matching decision between applications and hardware resources. The researches of heterogeneous scheduling in recent years are systematically summarized in the paper. This paper also analyzes the scheduling challenges and techniques under the environment of performance asymmetric multicore processors from the following aspects:optimization objectives, analysis model, scheduling decision, and algorithm evaluation. Finally, the future work is prospected from the perspective of software and hardware integration. |
| Key words: heterogeneous multi-cores AMP heterogeneous scheduling scheduling algorithm thread assignment |
