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| 基于CUDA 渲染器的顺序独立透明现象的单遍高效绘制 |
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黄梦成1,2, 刘芳1,3, 刘学慧1, 吴恩华1,4
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1.中国科学院 软件研究所 计算机科学国家重点实验室,北京 100190;2.中国科学院 研究生院,北京 100049;3.中国科学院 计算机网络信息中心 超级计算中心,北京 100190;4.澳门大学 科学技术学院 电脑与资讯科学系,澳门
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| 摘要: |
| 提出一种顺序独立透明现象的单遍高效绘制算法.首先设计了一个基于计算统一设备架构(compute unified device architecture,简称CUDA)的可编程渲染器.该系统采用扫描线算法光栅化场景,为每个像素生成多个对应的片元,同时,在GPU(graphics processing unit)的全局内存上为每个像素分配一个数组,以存储其相应的片元.基于这个框架,提出了两种并发的片元收集及排序策略,以单遍高效地绘制顺序独立的透明现象.第1 种策略利用CUDA 的原子操作符atomicMin 收集各个像素上对应的所有片元并按深度动态排序,在后处理中片元即可按序逐一融合;第2 种策略采用CUDA 的原子操作符atomicInc 按光栅化顺序收集所有片元,然后在后处理中按深度排序后再逐一融合.实验结果表明,与基于传统图形管线的经典深度剥离方法相比,该方法可以更高效地绘制顺序独立的透明现象,同时生成正确的绘制效果. |
| 关键词: 图形处理器 计算统一设备架构 顺序独立的透明现象 深度剥离 原子操作 |
| DOI：10.3724/SP.J.1001.2011.03932 |
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| 基金项目:国家自然科学基金(60833007, 60773030); 国家重点基础研究发展计划(973)(2009CB320802); 国家高技术研究发展计划(863)(2008AA01Z301); 中国科学院知识创新工程重大项目(KGCX1-YW-13); 中国科学院信息化专项(INFO-115-B01); 澳门大学研究基金 |
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| Efficient Rendering of Single-Pass Order-Independent Transparency via CUDA Renderer |
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HUANG Meng-Cheng1,2, LIU Fang1,3, LIU Xue-Hui1, WU En-Hua1,4
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1.State Key Laboratory of Computer Science, Institute of Software, The Chinese Academy of Sciences, Beijing 100190, China;2.Graduate University, The Chinese Academy of Sciences, Beijing 100049, China;3.Supercomputing Center, Computer Network Information Center, The Chinese Academy of Sciences, Beijing 100190, China;4.Department of Computer and Information Science, Faculty of Science and Technology, University of Macau, Macao, China
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| Abstract: |
| This paper presents a highly efficient algorithm for efficient order-independent transparency via compute unified device architecture (CUDA) in a single geometry pass. The study designs a CUDA renderer system to rasterize the scene by the scan-line algorithm, generating multiple fragments for each pixel. Meanwhile, a fixed size array is allocated per pixel in a GPU (graphics processing unit) global memory for storage. Next, this paper describes two schemes to capture and sorts the fragments per pixel via the atomic operations in CUDA. The first scheme stores the depth values of the fragments into an array of the corresponding pixel and sorts them on the fly using the atomicMin operation in CUDA. A following CUDA kernel will blend the fragments per pixel in depth order. The second scheme captures the fragments in rasterization order using the atomicInc operation in CUDA. During post-processing, the fragments per pixel array will be sorted in depth order before blending. Experimental result shows that this algorithm shows a significant improvement in classical depth peeling, producing faithful results. |
| Key words: graphics processing unit compute unified device architecture order-independent transparency depth peeling atomic operation |
