| 摘要: |
| ＦＰ—ＶＬＳＩ自动综合系统是一个集成化的ＶＬＳＩ自动设计工具，它能完成从并行算法到脉动算法到脉动结构再到逻辑结构最后到ＣＭＯＳ版图的自动综合过程．ＦＰ—ＶＬＳＩ系统以脉动阵列为ＶＬＳＩ的体系结构，采用具有良好代数性质的ＦＰ／Ｂ语言作为各层次的描述语言，通过程序变换进行综合和优化．该系统支持形式化的ＶＬＳＩ设计方法，能保证设计结果的正确性． |
| 关键词: 函数语言 自动综合 脉动阵列 逻辑电路 |
| DOI： |
| 分类号: |
| 基金项目:国家教委博士基金,国家自然科学基金 |
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| FP-VLSI-AN AUTOMATIC SYNTHESIS SYSTEM |
|
Sun Yongqiang,Hu Zhenjiang,Yuan Xin
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| Abstract: |
| P-VLSI, an integrated automatic synthesis system for VLSI design, is able to automatically synthesize a parallel algorithm to its CMOS implementation. This system synthesizes and optimizes the design by program transformation, while adopting systolic array as VLSI architecture and using a functional programming language FP/B for description. FP-VLSI system supports formal VLSI design method and guarantee the correctness of the result. |
| Key words: Functional language automatic synthesis systolic array logic circuit |
