Journal of Software:2020.31(10):3087-3099

(上海交通大学 软件学院, 上海 200240)
FPGA Acceleration System Development Tools: Survey and Practice
LIU Yan-Qiang,QI Zheng-Wei,GUAN Hai-Bing
(School of Software Engineering, Shanghai Jiaotong University, Shanghai 200240, China)
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Received:February 09, 2020    Revised:April 04, 2020
> 中文摘要: 近年来,现场可编程逻辑门阵列(FPGA)在异构计算领域因其优异的可定制性和可重配置特点吸引了工业界和学术界的广泛关注.基于FPGA的硬件加速系统设计涉及到深度的软硬件协同开发,利用软硬件各自开发工具分别开发再集成的传统开发方式具有学习门槛高,集成、测试、部署耗时长等缺陷,开发人员难以利用FPGA可快速重配置的特点来实现系统开发过程中的快速原型和快速迭代.如何让硬件加速系统的开发利用到现代软件工程和程序语言领域的成果,研究者们经历了长期的探索,首先根据相关研究总结了硬件及硬件加速系统开发工具设计的历史教训和成功经验,然后介绍设计实践,最后进行总结并提出对未来的展望.
Abstract:Field-programmable gate arrays (FPGAs) in heterogeneous computing have been attracting more and more attention due to its customizability and reconfigurability. Development of acceleration systems based on FPGAs involves the cooperation of both hardware and software developers. Building the systems by integrating software part and hardware part that are developed by independent tool chains introduces steep learning curve and difficulties in testing and deployment, thus preventing rapid prototyping. It has been a long academic history on how to make hardware design benefit from the progress in software engineering and software programming languages. This article will first present a survey on the design of development tools for hardware or hardware acceleration systems, and then will show the work of authors. Finally, a conclusion is drawn and the future prospect is discussed.
keywords: FPGA  DSL  software/hardware co-design  HDL  HLS
文章编号:     中图分类号:TP311    文献标志码:
基金项目:国家自然科学基金(61672344,61525204,61732010);国家重点研发计划(2016YFB1000502) 国家自然科学基金(61672344,61525204,61732010);国家重点研发计划(2016YFB1000502)
Foundation items:National Natural Science Foundation of China (61672344, 61525204, 61732010); National Key Research and Development Program of China (2016YFB1000502)
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LIU Yan-Qiang,QI Zheng-Wei,GUAN Hai-Bing.FPGA Acceleration System Development Tools: Survey and Practice.Journal of Software,2020,31(10):3087-3099