A High Performance EBCOT Coding and Its VLSI Architecture
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    Abstract:

    This paper proposes an efficient architecture composed of bit plane-parallel and pass-parallel coder for EBCOT (embedded block coding with optimized truncation) entropy encoder used in JPEG2000.After the detailed analysis of EBCOT architecture in JPEG2000, the coding information of each bit plane and the corresponding passes can be obtained simultaneously. Therefore, bit plane-parallel and pass-parallel coding (BPPP) is proposed, and its VLSI architecture is shown in details. The analysis and the corresponding experimental results show that the proposed architecture reduces the processing time greatly compared with others, and a FPGA prototype chip is designed and can process 512×512 gray level images with 30 frames per second at 65MHz working frequency. The quality of images reaches the results released by JPEG2000.

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刘凯,李云松,吴成柯.高性能的EBCOT编码及其VLSI结构.软件学报,2006,17(7):1553-1560

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History
  • Received:May 31,2004
  • Revised:May 31,2004
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