This paper provides an approach to test real-time systems modeled by timed input/output automata (TSIOA), which is a variant of TA (timed automata). This method consists of three steps. Firstly, system model depicted by TSIOA is transformed into an USTGSS (untimed stable label transition graph of symbolic state) which does not contain abstract time delay transitions. Then, the testing methods based on LTS (labeled transition system) are used to the generate transition sequences from USTGSS according to structural coverage criteria. Finally, a process of constructing and executing the test cases is given, in which object functions of time delay variables are imported, and time delay variables used in the transition sequences are solved dynamically by linear programming techniques.